74HC125 Quad 3-State Non-Inverting Buffer
Quadruple bus buffer gates with independent active-low output enables (~OE), frequently used for bus multiplexing and SPI chip-select isolation.
Aliase:SN74HC125N, 74125, 74HCT125, Quad Buffer
DIP-14 / SOIC-14 Top View
14 Pins
Pinout Table14
| Pin | Signal / Name | Type | Alternative Functions |
|---|---|---|---|
| 1 | ~1OE | Digital | Gate 1 Output Enable (Active Low — HIGH = Hi-Z) |
| 2 | 1A | Digital | Gate 1 Data Input |
| 3 | 1Y | Digital | Gate 1 3-State Output |
| 4 | ~2OE | Digital | Gate 2 Output Enable (Active Low — HIGH = Hi-Z) |
| 5 | 2A | Digital | Gate 2 Data Input |
| 6 | 2Y | Digital | Gate 2 3-State Output |
| 7 | GND | Ground | Ground (0V) |
| 8 | 3Y | Digital | Gate 3 3-State Output |
| 9 | 3A | Digital | Gate 3 Data Input |
| 10 | ~3OE | Digital | Gate 3 Output Enable (Active Low — HIGH = Hi-Z) |
| 11 | 4Y | Digital | Gate 4 3-State Output |
| 12 | 4A | Digital | Gate 4 Data Input |
| 13 | ~4OE | Digital | Gate 4 Output Enable (Active Low — HIGH = Hi-Z) |
| 14 | VCC | Power | Supply Voltage (2.0V to 6.0V DC) |