74HC08 / 74LS08 Quad 2-Input AND Gate
Quad 2-input AND gate. Available in 74LS (low-power Schottky TTL) and 74HC (high-speed CMOS) families, pin-compatible. Output is HIGH only when both inputs are HIGH.
Aliase:SN74HC08N, 74LS08, 74HCT08, Quad AND Gate
DIP-14 Top View
14 Pins
Pinout Table14
| Pin | Signal / Name | Type | Alternative Functions |
|---|---|---|---|
| 1 | 1A | Digital | AND Gate 1 Input A |
| 2 | 1B | Digital | AND Gate 1 Input B |
| 3 | 1Y | Digital | AND Gate 1 Output (HIGH when 1A AND 1B are HIGH) |
| 4 | 2A | Digital | AND Gate 2 Input A |
| 5 | 2B | Digital | AND Gate 2 Input B |
| 6 | 2Y | Digital | AND Gate 2 Output (HIGH when 2A AND 2B are HIGH) |
| 7 | GND | Ground | System Ground (0V) |
| 8 | 3Y | Digital | AND Gate 3 Output (HIGH when 3A AND 3B are HIGH) |
| 9 | 3A | Digital | AND Gate 3 Input A |
| 10 | 3B | Digital | AND Gate 3 Input B |
| 11 | 4Y | Digital | AND Gate 4 Output (HIGH when 4A AND 4B are HIGH) |
| 12 | 4A | Digital | AND Gate 4 Input A |
| 13 | 4B | Digital | AND Gate 4 Input B |
| 14 | VCC | Power | Positive Power Supply (5V for LS, 2–6V for HC) |