SMARC 2.2 Computer-on-Module Pinout
Standardized 314-pin edge connector pinout specification for Smart Mobility ARChitecture (SMARC 2.2) Computer-on-Modules (82x50mm & 82x80mm). Defines LVDS/eDP/DSI, HDMI/DP++, 4x PCIe, 2x GBE, 6x USB 2.0/3.2, 4x MIPI-CSI, SATA, SPI/eSPI/QSPI, audio, serial and power management signals.
Aliase:SMARC, SMARC 2.0, SMARC 2.1, SMARC 2.2, SGeT SMARC, Smart Mobility ARChitecture, 314-Pin MXM3 SMARC
Primary Side (Top / Front) – P1 bis P156
156 Pins
Pin-Tabelle156
| Pin | Signal / Name | Typ | Alternative Funktionen |
|---|---|---|---|
| P1 | SMB_ALERT# | Digital | SMBus Alert# Interrupt Signal (1.8V to 5V OD CMOS) |
| P2 | GND | Ground | Module Signal & Power Return Ground |
| P3 | CSI1_CK+ | Digital | MIPI CSI1 Differential Clock Input (Positive) |
| P4 | CSI1_CK- | Digital | MIPI CSI1 Differential Clock Input (Negative) |
| P5 | GBE1_SDP | Digital | GBE1 IEEE 1588 Precision Time Protocol Trigger (SDP) |
| P6 | GBE0_SDP | Digital | GBE0 IEEE 1588 Precision Time Protocol Trigger (SDP) |
| P7 | CSI1_RX0+ | Digital | MIPI CSI1 Differential Data Lane 0 (Positive) |
| P8 | CSI1_RX0- | Digital | MIPI CSI1 Differential Data Lane 0 (Negative) |
| P9 | GND | Ground | Module Signal & Power Return Ground |
| P10 | CSI1_RX1+ | Digital | MIPI CSI1 Differential Data Lane 1 (Positive) |
| P11 | CSI1_RX1- | Digital | MIPI CSI1 Differential Data Lane 1 (Negative) |
| P12 | GND | Ground | Module Signal & Power Return Ground |
| P13 | CSI1_RX2+ | Digital | MIPI CSI1 Differential Data Lane 2 (Positive) |
| P14 | CSI1_RX2- | Digital | MIPI CSI1 Differential Data Lane 2 (Negative) |
| P15 | GND | Ground | Module Signal & Power Return Ground |
| P16 | CSI1_RX3+ | Digital | MIPI CSI1 Differential Data Lane 3 (Positive) |
| P17 | CSI1_RX3- | Digital | MIPI CSI1 Differential Data Lane 3 (Negative) |
| P18 | GND | Ground | Module Signal & Power Return Ground |
| P19 | GBE0_MDI3- | Analog | Gigabit Ethernet 0 Media Dependent Interface Pair 3 (Negative) |
| P20 | GBE0_MDI3+ | Analog | Gigabit Ethernet 0 Media Dependent Interface Pair 3 (Positive) |
| P21 | GBE0_LINK_MID# | Digital | GBE0 Lower Link Speed LED Indicator (OD CMOS, Active Low) |
| P22 | GBE0_LINK_MAX# | Digital | GBE0 Maximum Link Speed LED Indicator (OD CMOS, Active Low) |
| P23 | GBE0_MDI2- | Analog | Gigabit Ethernet 0 Media Dependent Interface Pair 2 (Negative) |
| P24 | GBE0_MDI2+ | Analog | Gigabit Ethernet 0 Media Dependent Interface Pair 2 (Positive) |
| P25 | GBE0_LINK_ACT# | Digital | GBE0 Link / Activity LED Indicator (OD CMOS, Active Low) |
| P26 | GBE0_MDI1- | Analog | Gigabit Ethernet 0 Media Dependent Interface Pair 1 (Negative) |
| P27 | GBE0_MDI1+ | Analog | Gigabit Ethernet 0 Media Dependent Interface Pair 1 (Positive) |
| P28 | GBE0_CTREF | Analog | Center-Tap Reference Voltage for GBE0 Magnetics (0 to 3.3V) |
| P29 | GBE0_MDI0- | Analog | Gigabit Ethernet 0 Media Dependent Interface Pair 0 (Negative) |
| P30 | GBE0_MDI0+ | Analog | Gigabit Ethernet 0 Media Dependent Interface Pair 0 (Positive) |
| P31 | SPI0_CS1# | Digital | SPI0 Master Chip Select 1 (1.8V CMOS) |
| P32 | GND | Ground | Module Signal & Power Return Ground |
| P33 | SDIO_WP | Digital | SDIO Write Protect Input (1.8V / 3.3V OD CMOS) |
| P34 | SDIO_CMD | Digital | SDIO Command / Response Line (1.8V / 3.3V CMOS) |
| P35 | SDIO_CD# | Digital | SDIO Card Detect Input (Active Low, 1.8V / 3.3V) |
| P36 | SDIO_CK | Digital | SDIO Clock Output (1.8V / 3.3V CMOS) |
| P37 | SDIO_PWR_EN | Digital | SDIO Power Enable Output (3.3V CMOS) |
| P38 | GND | Ground | Module Signal & Power Return Ground |
| P39 | SDIO_D0 | Digital | SDIO Data Line 0 (1.8V / 3.3V CMOS) |
| P40 | SDIO_D1 | Digital | SDIO Data Line 1 (1.8V / 3.3V CMOS) |
| P41 | SDIO_D2 | Digital | SDIO Data Line 2 (1.8V / 3.3V CMOS) |
| P42 | SDIO_D3 | Digital | SDIO Data Line 3 (1.8V / 3.3V CMOS) |
| P43 | SPI0_CS0# | Digital | SPI0 Master Chip Select 0 (Carrier Boot Option) |
| P44 | SPI0_CK | Digital | SPI0 Clock Output (1.8V CMOS) |
| P45 | SPI0_DIN | Digital | SPI0 Master In Slave Out / MISO (1.8V CMOS) |
| P46 | SPI0_DO | Digital | SPI0 Master Out Slave In / MOSI (1.8V CMOS) |
| P47 | GND | Ground | Module Signal & Power Return Ground |
| P48 | SATA_TX+ | Digital | Serial ATA 0 Transmit Data Pair (Positive) |
| P49 | SATA_TX- | Digital | Serial ATA 0 Transmit Data Pair (Negative) |
| P50 | GND | Ground | Module Signal & Power Return Ground |
| P51 | SATA_RX+ | Digital | Serial ATA 0 Receive Data Pair (Positive) |
| P52 | SATA_RX- | Digital | Serial ATA 0 Receive Data Pair (Negative) |
| P53 | GND | Ground | Module Signal & Power Return Ground |
| P54 | ESPI_CS0# / SPI1_CS0# / QSPI_CS0# | Digital | eSPI Master Chip Select 0SPI1 Master Chip Select 0QSPI Master Chip Select 0 |
| P55 | ESPI_CS1# / SPI1_CS1# / QSPI_CS1# | Digital | eSPI Master Chip Select 1SPI1 Master Chip Select 1QSPI Master Chip Select 1 |
| P56 | ESPI_CK / SPI1_CK / QSPI_CK | Digital | eSPI Master Clock OutputSPI1 Clock OutputQSPI Clock Output |
| P57 | ESPI_IO_1 / SPI1_DIN / QSPI_IO_1 | Digital | eSPI Master Data 1 / Slave MISOSPI1 Master Data Input (MISO)QSPI Data Input/Output 1 |
| P58 | ESPI_IO_0 / SPI1_DO / QSPI_IO_0 | Digital | eSPI Master Data 0 / Master MOSISPI1 Master Data Output (MOSI)QSPI Data Input/Output 0 |
| P59 | GND | Ground | Module Signal & Power Return Ground |
| P60 | USB0+ | Digital | USB Port 0 Data Differential Pair (Positive) |
| P61 | USB0- | Digital | USB Port 0 Data Differential Pair (Negative) |
| P62 | USB0_EN_OC# | Digital | USB Port 0 Power Enable Output & Over-Current Sense Input |
| P63 | USB0_VBUS_DET | Power | USB Port 0 VBUS Host Power Detection (5V Input) |
| P64 | USB0_OTG_ID | Digital | USB Port 0 On-The-Go ID Pin (Host/Client Select) |
| P65 | USB1+ | Digital | USB Port 1 Data Differential Pair (Positive) |
| P66 | USB1- | Digital | USB Port 1 Data Differential Pair (Negative) |
| P67 | USB1_EN_OC# | Digital | USB Port 1 Power Enable Output & Over-Current Sense Input |
| P68 | GND | Ground | Module Signal & Power Return Ground |
| P69 | USB2+ | Digital | USB Port 2 Data Differential Pair (Positive) |
| P70 | USB2- | Digital | USB Port 2 Data Differential Pair (Negative) |
| P71 | USB2_EN_OC# | Digital | USB Port 2 Power Enable Output & Over-Current Sense Input |
| P72 | RSVD | NC | Reserved (Leave Unconnected) |
| P73 | RSVD | NC | Reserved (Leave Unconnected) |
| P74 | USB3_EN_OC# | Digital | USB Port 3 Power Enable Output & Over-Current Sense Input |
| P75 | PCIE_A_RST# | Digital | PCI Express Port A Reset Output (3.3V CMOS, Active Low) |
| P76 | USB4_EN_OC# | Digital | USB Port 4 Power Enable Output & Over-Current Sense Input |
| P77 | PCIE_B_CKREQ# | Digital | PCI Express Port B Clock Request Input (3.3V OD) |
| P78 | PCIE_A_CKREQ# | Digital | PCI Express Port A Clock Request Input (3.3V OD) |
| P79 | GND | Ground | Module Signal & Power Return Ground |
| P80 | PCIE_C_REFCK+ | Digital | PCI Express Port C Reference Clock Output (Positive) |
| P81 | PCIE_C_REFCK- | Digital | PCI Express Port C Reference Clock Output (Negative) |
| P82 | GND | Ground | Module Signal & Power Return Ground |
| P83 | PCIE_A_REFCK+ | Digital | PCI Express Port A Reference Clock Output (Positive) |
| P84 | PCIE_A_REFCK- | Digital | PCI Express Port A Reference Clock Output (Negative) |
| P85 | GND | Ground | Module Signal & Power Return Ground |
| P86 | PCIE_A_RX+ | Digital | PCI Express Port A Receive Differential Pair (Positive) |
| P87 | PCIE_A_RX- | Digital | PCI Express Port A Receive Differential Pair (Negative) |
| P88 | GND | Ground | Module Signal & Power Return Ground |
| P89 | PCIE_A_TX+ | Digital | PCI Express Port A Transmit Differential Pair (Positive) |
| P90 | PCIE_A_TX- | Digital | PCI Express Port A Transmit Differential Pair (Negative) |
| P91 | GND | Ground | Module Signal & Power Return Ground |
| P92 | HDMI_D2+ / DP1_LANE0+ | Digital | HDMI Port Data 2 Differential Pair (Positive)Secondary DP Port Lane 0 Data Pair (Positive) |
| P93 | HDMI_D2- / DP1_LANE0- | Digital | HDMI Port Data 2 Differential Pair (Negative)Secondary DP Port Lane 0 Data Pair (Negative) |
| P94 | GND | Ground | Module Signal & Power Return Ground |
| P95 | HDMI_D1+ / DP1_LANE1+ | Digital | HDMI Port Data 1 Differential Pair (Positive)Secondary DP Port Lane 1 Data Pair (Positive) |
| P96 | HDMI_D1- / DP1_LANE1- | Digital | HDMI Port Data 1 Differential Pair (Negative)Secondary DP Port Lane 1 Data Pair (Negative) |
| P97 | GND | Ground | Module Signal & Power Return Ground |
| P98 | HDMI_D0+ / DP1_LANE2+ | Digital | HDMI Port Data 0 Differential Pair (Positive)Secondary DP Port Lane 2 Data Pair (Positive) |
| P99 | HDMI_D0- / DP1_LANE2- | Digital | HDMI Port Data 0 Differential Pair (Negative)Secondary DP Port Lane 2 Data Pair (Negative) |
| P100 | GND | Ground | Module Signal & Power Return Ground |
| P101 | HDMI_CK+ / DP1_LANE3+ | Digital | HDMI Port Clock Differential Pair (Positive)Secondary DP Port Lane 3 Data Pair (Positive) |
| P102 | HDMI_CK- / DP1_LANE3- | Digital | HDMI Port Clock Differential Pair (Negative)Secondary DP Port Lane 3 Data Pair (Negative) |
| P103 | GND | Ground | Module Signal & Power Return Ground |
| P104 | HDMI_HPD / DP1_HPD | Digital | HDMI Hot Plug Detect / Secondary DP Hot Plug Detect (1.8V CMOS) |
| P105 | HDMI_CTRL_CK / DP1_AUX+ | Digital | HDMI DDC I2C Clock (1.8V OD CMOS)Secondary DP Auxiliary Channel (Positive) |
| P106 | HDMI_CTRL_DAT / DP1_AUX- | Digital | HDMI DDC I2C Data (1.8V OD CMOS)Secondary DP Auxiliary Channel (Negative) |
| P107 | DP1_AUX_SEL | Digital | DP1 Auxiliary Selection Pin (GND=DP, 1.8V=HDMI) |
| P108 | GPIO0 / CAM0_PWR# | Digital | General Purpose I/O 0 (1.8V CMOS)Camera 0 Power Enable (Active Low) |
| P109 | GPIO1 / CAM1_PWR# | Digital | General Purpose I/O 1 (1.8V CMOS)Camera 1 Power Enable (Active Low) |
| P110 | GPIO2 / CAM0_RST# | Digital | General Purpose I/O 2 (1.8V CMOS)Camera 0 Reset Output (Active Low) |
| P111 | GPIO3 / CAM1_RST# | Digital | General Purpose I/O 3 (1.8V CMOS)Camera 1 Reset Output (Active Low) |
| P112 | GPIO4 / HDA_RST# | Digital | General Purpose I/O 4 (1.8V CMOS)HD Audio Reset Output (Active Low) |
| P113 | GPIO5 / PWM_OUT | Digital | General Purpose I/O 5 (1.8V CMOS)Fan Speed Control PWM Output |
| P114 | GPIO6 / TACHIN | Digital | General Purpose I/O 6 (Lowest Interrupt Latency)Fan Tachometer Input (1.8V CMOS) |
| P115 | GPIO7 | Digital | General Purpose I/O 7 (1.8V CMOS)SERDES 0 Interrupt Input (Active Low) |
| P116 | GPIO8 | Digital | General Purpose I/O 8 (1.8V CMOS)SERDES 1 Interrupt Input (Active Low) |
| P117 | GPIO9 | Digital | General Purpose I/O 9 (1.8V CMOS) |
| P118 | GPIO10 | Digital | General Purpose I/O 10 (1.8V CMOS) |
| P119 | GPIO11 | Digital | General Purpose I/O 11 (1.8V CMOS) |
| P120 | GND | Ground | Module Signal & Power Return Ground |
| P121 | I2C_PM_CK | Digital | Power Management I2C Clock / SMBus Clock (1.8V OD CMOS) |
| P122 | I2C_PM_DAT | Digital | Power Management I2C Data / SMBus Data (1.8V OD CMOS) |
| P123 | BOOT_SEL0# | Digital | Boot Source Select Input Strap 0 (1.8V OD CMOS, Active Low) |
| P124 | BOOT_SEL1# | Digital | Boot Source Select Input Strap 1 (1.8V OD CMOS, Active Low) |
| P125 | BOOT_SEL2# | Digital | Boot Source Select Input Strap 2 (1.8V OD CMOS, Active Low) |
| P126 | RESET_OUT# | Digital | General Purpose Reset Output to Carrier Board (1.8V CMOS, Active Low) |
| P127 | RESET_IN# | Digital | Carrier Reset Input to Module (1.8V to 5V OD CMOS, Active Low) |
| P128 | POWER_BTN# | Digital | Power Button Input from Carrier (1.8V to 5V OD CMOS, Active Low) |
| P129 | SER0_TX | Digital | Asynchronous Serial Port 0 Transmit Data (1.8V CMOS) |
| P130 | SER0_RX | Digital | Asynchronous Serial Port 0 Receive Data (1.8V CMOS) |
| P131 | SER0_RTS# | Digital | Serial Port 0 Request To Send Handshake Output (Active Low) |
| P132 | SER0_CTS# | Digital | Serial Port 0 Clear To Send Handshake Input (Active Low) |
| P133 | GND | Ground | Module Signal & Power Return Ground |
| P134 | SER1_TX | Digital | Asynchronous Serial Port 1 Transmit Data (1.8V CMOS) |
| P135 | SER1_RX | Digital | Asynchronous Serial Port 1 Receive Data (1.8V CMOS) |
| P136 | SER2_TX | Digital | Asynchronous Serial Port 2 Transmit Data (1.8V CMOS) |
| P137 | SER2_RX | Digital | Asynchronous Serial Port 2 Receive Data (1.8V CMOS) |
| P138 | SER2_RTS# | Digital | Serial Port 2 Request To Send Handshake Output (Active Low) |
| P139 | SER2_CTS# | Digital | Serial Port 2 Clear To Send Handshake Input (Active Low) |
| P140 | SER3_TX | Digital | Asynchronous Serial Port 3 Transmit Data (1.8V CMOS) |
| P141 | SER3_RX | Digital | Asynchronous Serial Port 3 Receive Data (1.8V CMOS) |
| P142 | GND | Ground | Module Signal & Power Return Ground |
| P143 | CAN0_TX | Digital | CAN Port 0 Transmit Output (1.8V CMOS) |
| P144 | CAN0_RX | Digital | CAN Port 0 Receive Input (1.8V CMOS) |
| P145 | CAN1_TX | Digital | CAN Port 1 Transmit Output (1.8V CMOS) |
| P146 | CAN1_RX | Digital | CAN Port 1 Receive Input (1.8V CMOS) |
| P147 | VDD_IN | Power | Module Main Power Supply Input (+3.0V to +5.25V DC) |
| P148 | VDD_IN | Power | Module Main Power Supply Input (+3.0V to +5.25V DC) |
| P149 | VDD_IN | Power | Module Main Power Supply Input (+3.0V to +5.25V DC) |
| P150 | VDD_IN | Power | Module Main Power Supply Input (+3.0V to +5.25V DC) |
| P151 | VDD_IN | Power | Module Main Power Supply Input (+3.0V to +5.25V DC) |
| P152 | VDD_IN | Power | Module Main Power Supply Input (+3.0V to +5.25V DC) |
| P153 | VDD_IN | Power | Module Main Power Supply Input (+3.0V to +5.25V DC) |
| P154 | VDD_IN | Power | Module Main Power Supply Input (+3.0V to +5.25V DC) |
| P155 | VDD_IN | Power | Module Main Power Supply Input (+3.0V to +5.25V DC) |
| P156 | VDD_IN | Power | Module Main Power Supply Input (+3.0V to +5.25V DC) |
Secondary Side (Bottom / Back) – S1 bis S158
158 Pins
Pin-Tabelle158
| Pin | Signal / Name | Typ | Alternative Funktionen |
|---|---|---|---|
| S1 | CSI1_TX+ / I2C_CAM1_CK | Digital | MIPI CSI1 Transmit Pair (Positive) / MIPI CSI-3Camera 1 I2C Clock (1.8V OD CMOS) |
| S2 | CSI1_TX- / I2C_CAM1_DAT | Digital | MIPI CSI1 Transmit Pair (Negative) / MIPI CSI-3Camera 1 I2C Data (1.8V OD CMOS) |
| S3 | GND | Ground | Module Signal & Power Return Ground |
| S4 | RSVD | NC | Reserved (Leave Unconnected) |
| S5 | CSI0_TX+ / I2C_CAM0_CK | Digital | MIPI CSI0 Transmit Pair (Positive) / MIPI CSI-3Camera 0 I2C Clock (1.8V OD CMOS) |
| S6 | CAM_MCK | Digital | Camera Master Clock Output (1.8V CMOS) |
| S7 | CSI0_TX- / I2C_CAM0_DAT | Digital | MIPI CSI0 Transmit Pair (Negative) / MIPI CSI-3Camera 0 I2C Data (1.8V OD CMOS) |
| S8 | CSI0_CK+ | Digital | MIPI CSI0 Differential Clock Input (Positive) |
| S9 | CSI0_CK- | Digital | MIPI CSI0 Differential Clock Input (Negative) |
| S10 | GND | Ground | Module Signal & Power Return Ground |
| S11 | CSI0_RX0+ | Digital | MIPI CSI0 Differential Data Lane 0 (Positive) |
| S12 | CSI0_RX0- | Digital | MIPI CSI0 Differential Data Lane 0 (Negative) |
| S13 | GND | Ground | Module Signal & Power Return Ground |
| S14 | CSI0_RX1+ | Digital | MIPI CSI0 Differential Data Lane 1 (Positive) |
| S15 | CSI0_RX1- | Digital | MIPI CSI0 Differential Data Lane 1 (Negative) |
| S16 | GND | Ground | Module Signal & Power Return Ground |
| S17 | GBE1_MDI0+ | Analog | Gigabit Ethernet 1 Media Dependent Interface Pair 0 (Positive) |
| S18 | GBE1_MDI0- | Analog | Gigabit Ethernet 1 Media Dependent Interface Pair 0 (Negative) |
| S19 | GBE1_LINK_MID# | Digital | GBE1 Lower Link Speed LED Indicator (OD CMOS, Active Low) |
| S20 | GBE1_MDI1+ | Analog | Gigabit Ethernet 1 Media Dependent Interface Pair 1 (Positive) |
| S21 | GBE1_MDI1- | Analog | Gigabit Ethernet 1 Media Dependent Interface Pair 1 (Negative) |
| S22 | GBE1_LINK_MAX# | Digital | GBE1 Maximum Link Speed LED Indicator (OD CMOS, Active Low) |
| S23 | GBE1_MDI2+ | Analog | Gigabit Ethernet 1 Media Dependent Interface Pair 2 (Positive) |
| S24 | GBE1_MDI2- | Analog | Gigabit Ethernet 1 Media Dependent Interface Pair 2 (Negative) |
| S25 | GND | Ground | Module Signal & Power Return Ground |
| S26 | GBE1_MDI3+ | Analog | Gigabit Ethernet 1 Media Dependent Interface Pair 3 (Positive) |
| S27 | GBE1_MDI3- | Analog | Gigabit Ethernet 1 Media Dependent Interface Pair 3 (Negative) |
| S28 | GBE1_CTREF | Analog | Center-Tap Reference Voltage for GBE1 Magnetics (0 to 3.3V) |
| S29 | PCIE_D_TX+ / SERDES_0_TX+ | Digital | PCI Express Port D Transmit Data Pair (Positive)Differential SERDES 0 Transmit Data Pair (Positive) |
| S30 | PCIE_D_TX- / SERDES_0_TX- | Digital | PCI Express Port D Transmit Data Pair (Negative)Differential SERDES 0 Transmit Data Pair (Negative) |
| S31 | GBE1_LINK_ACT# | Digital | GBE1 Link / Activity LED Indicator (OD CMOS, Active Low) |
| S32 | PCIE_D_RX+ / SERDES_0_RX+ | Digital | PCI Express Port D Receive Data Pair (Positive)Differential SERDES 0 Receive Data Pair (Positive) |
| S33 | PCIE_D_RX- / SERDES_0_RX- | Digital | PCI Express Port D Receive Data Pair (Negative)Differential SERDES 0 Receive Data Pair (Negative) |
| S34 | GND | Ground | Module Signal & Power Return Ground |
| S35 | USB4+ | Digital | USB Port 4 Data Differential Pair (Positive) |
| S36 | USB4- | Digital | USB Port 4 Data Differential Pair (Negative) |
| S37 | USB3_VBUS_DET | Power | USB Port 3 VBUS Host Power Detection (5V Input) |
| S38 | AUDIO_MCK | Digital | Master Clock Output to Audio Codecs (1.8V CMOS) |
| S39 | I2S0_LRCK | Digital | I2S0 Left & Right Synchronization Clock (1.8V CMOS) |
| S40 | I2S0_SDOUT | Digital | I2S0 Digital Audio Serial Data Output (1.8V CMOS) |
| S41 | I2S0_SDIN | Digital | I2S0 Digital Audio Serial Data Input (1.8V CMOS) |
| S42 | I2S0_CK | Digital | I2S0 Digital Audio Serial Clock (1.8V CMOS) |
| S43 | ESPI_ALERT0# | Digital | eSPI Slave Alert 0 (1.8V OD CMOS, Active Low) |
| S44 | ESPI_ALERT1# | Digital | eSPI Slave Alert 1 (1.8V OD CMOS, Active Low) |
| S45 | MDIO_CLK | Digital | Management Data I/O Clock Output to PHYs (1.8V CMOS) |
| S46 | MDIO_DAT | Digital | Management Data I/O Bi-directional Data (1.8V OD CMOS) |
| S47 | GND | Ground | Module Signal & Power Return Ground |
| S48 | I2C_GP_CK | Digital | General Purpose I2C Bus Clock (1.8V OD CMOS) |
| S49 | I2C_GP_DAT | Digital | General Purpose I2C Bus Data (1.8V OD CMOS) |
| S50 | I2S2_LRCK / HDA_SYNC / SNDW_CLK1 | Digital | I2S2 Left & Right Synchronization Clock (1.8V CMOS)HD Audio Sample Sync Clock (1.5V / 1.8V CMOS)Soundwire 1 Master Clock Output (1.8V CMOS) |
| S51 | I2S2_SDOUT / HDA_SDO / SNDW_DAT1 | Digital | I2S2 Digital Audio Serial Data Output (1.8V CMOS)HD Audio Serial Data Out to Codec (1.5V / 1.8V CMOS)Soundwire 1 Bi-directional PCM Audio Data Lane |
| S52 | I2S2_SDIN / HDA_SDI / SNDW_DAT0 | Digital | I2S2 Digital Audio Serial Data Input (1.8V CMOS)HD Audio Serial Data In from Codec (1.5V / 1.8V CMOS)Soundwire 0 Bi-directional PCM Audio Data Lane |
| S53 | I2S2_CK / HDA_CK / SNDW_CLK0 | Digital | I2S2 Digital Audio Serial Clock (1.8V CMOS)HD Audio Clock Output to Codec (1.5V / 1.8V CMOS)Soundwire 0 Master Clock Output (1.8V CMOS) |
| S54 | SATA_ACT# | Digital | SATA Activity LED Indicator Output (3.3V OD, Active Low) |
| S55 | USB5_EN_OC# | Digital | USB Port 5 Power Enable Output & Over-Current Sense Input |
| S56 | ESPI_IO_2 / QSPI_IO_2 | Digital | eSPI Master Data Input/Output 2 (1.8V CMOS)QuadSPI Data Input/Output 2 (1.8V CMOS) |
| S57 | ESPI_IO_3 / QSPI_IO_3 | Digital | eSPI Master Data Input/Output 3 (1.8V CMOS)QuadSPI Data Input/Output 3 (1.8V CMOS) |
| S58 | ESPI_RESET# | Digital | eSPI Bus Master Reset Output (1.8V CMOS, Active Low) |
| S59 | USB5+ | Digital | USB Port 5 Data Differential Pair (Positive) |
| S60 | USB5- | Digital | USB Port 5 Data Differential Pair (Negative) |
| S61 | GND | Ground | Module Signal & Power Return Ground |
| S62 | USB3_SSTX+ | Digital | USB 3.2 Gen 1 Port 3 SuperSpeed Transmit Pair (Positive) |
| S63 | USB3_SSTX- | Digital | USB 3.2 Gen 1 Port 3 SuperSpeed Transmit Pair (Negative) |
| S64 | GND | Ground | Module Signal & Power Return Ground |
| S65 | USB3_SSRX+ | Digital | USB 3.2 Gen 1 Port 3 SuperSpeed Receive Pair (Positive) |
| S66 | USB3_SSRX- | Digital | USB 3.2 Gen 1 Port 3 SuperSpeed Receive Pair (Negative) |
| S67 | GND | Ground | Module Signal & Power Return Ground |
| S68 | USB3+ | Digital | USB Port 3 Data Differential Pair (Positive) |
| S69 | USB3- | Digital | USB Port 3 Data Differential Pair (Negative) |
| S70 | GND | Ground | Module Signal & Power Return Ground |
| S71 | USB2_SSTX+ | Digital | USB 3.2 Gen 1 Port 2 SuperSpeed Transmit Pair (Positive) |
| S72 | USB2_SSTX- | Digital | USB 3.2 Gen 1 Port 2 SuperSpeed Transmit Pair (Negative) |
| S73 | GND | Ground | Module Signal & Power Return Ground |
| S74 | USB2_SSRX+ | Digital | USB 3.2 Gen 1 Port 2 SuperSpeed Receive Pair (Positive) |
| S75 | USB2_SSRX- | Digital | USB 3.2 Gen 1 Port 2 SuperSpeed Receive Pair (Negative) |
| S76 | PCIE_B_RST# | Digital | PCI Express Port B Reset Output (3.3V CMOS, Active Low) |
| S77 | PCIE_C_RST# / SERDES_RST# | Digital | PCI Express Port C Reset Output (3.3V CMOS, Active Low)SERDES Ports 0/1 Reset Output (3.3V CMOS, Active Low) |
| S78 | PCIE_C_RX+ / SERDES_1_RX+ | Digital | PCI Express Port C Receive Differential Pair (Positive)Differential SERDES 1 Receive Data Pair (Positive) |
| S79 | PCIE_C_RX- / SERDES_1_RX- | Digital | PCI Express Port C Receive Differential Pair (Negative)Differential SERDES 1 Receive Data Pair (Negative) |
| S80 | GND | Ground | Module Signal & Power Return Ground |
| S81 | PCIE_C_TX+ / SERDES_1_TX+ | Digital | PCI Express Port C Transmit Differential Pair (Positive)Differential SERDES 1 Transmit Data Pair (Positive) |
| S82 | PCIE_C_TX- / SERDES_1_TX- | Digital | PCI Express Port C Transmit Differential Pair (Negative)Differential SERDES 1 Transmit Data Pair (Negative) |
| S83 | GND | Ground | Module Signal & Power Return Ground |
| S84 | PCIE_B_REFCK+ | Digital | PCI Express Port B Reference Clock Output (Positive) |
| S85 | PCIE_B_REFCK- | Digital | PCI Express Port B Reference Clock Output (Negative) |
| S86 | GND | Ground | Module Signal & Power Return Ground |
| S87 | PCIE_B_RX+ | Digital | PCI Express Port B Receive Differential Pair (Positive) |
| S88 | PCIE_B_RX- | Digital | PCI Express Port B Receive Differential Pair (Negative) |
| S89 | GND | Ground | Module Signal & Power Return Ground |
| S90 | PCIE_B_TX+ | Digital | PCI Express Port B Transmit Differential Pair (Positive) |
| S91 | PCIE_B_TX- | Digital | PCI Express Port B Transmit Differential Pair (Negative) |
| S92 | GND | Ground | Module Signal & Power Return Ground |
| S93 | DP0_LANE0+ | Digital | Primary DP Port Lane 0 Data Differential Pair (Positive) |
| S94 | DP0_LANE0- | Digital | Primary DP Port Lane 0 Data Differential Pair (Negative) |
| S95 | DP0_AUX_SEL | Digital | DP0 Auxiliary Selection Pin (GND=DP, 1.8V=HDMI) |
| S96 | DP0_LANE1+ | Digital | Primary DP Port Lane 1 Data Differential Pair (Positive) |
| S97 | DP0_LANE1- | Digital | Primary DP Port Lane 1 Data Differential Pair (Negative) |
| S98 | DP0_HPD | Digital | Primary DP Hot Plug Detect Input (1.8V CMOS) |
| S99 | DP0_LANE2+ | Digital | Primary DP Port Lane 2 Data Differential Pair (Positive) |
| S100 | DP0_LANE2- | Digital | Primary DP Port Lane 2 Data Differential Pair (Negative) |
| S101 | GND | Ground | Module Signal & Power Return Ground |
| S102 | DP0_LANE3+ | Digital | Primary DP Port Lane 3 Data Differential Pair (Positive) |
| S103 | DP0_LANE3- | Digital | Primary DP Port Lane 3 Data Differential Pair (Negative) |
| S104 | USB3_OTG_ID | Digital | USB Port 3 On-The-Go ID Pin (Host/Client Select) |
| S105 | DP0_AUX+ | Digital | Primary DP Auxiliary Channel (Positive) / HDMI DDC Clock |
| S106 | DP0_AUX- | Digital | Primary DP Auxiliary Channel (Negative) / HDMI DDC Data |
| S107 | LCD1_BKLT_EN | Digital | Secondary Panel Backlight Enable Output (1.8V CMOS) |
| S108 | LVDS1_CK+ / eDP1_AUX+ / DSI1_CLK+ | Digital | Secondary LVDS Channel Clock Pair (Positive)Secondary eDP AUX Channel (Positive)Secondary MIPI DSI Clock Pair (Positive) |
| S109 | LVDS1_CK- / eDP1_AUX- / DSI1_CLK- | Digital | Secondary LVDS Channel Clock Pair (Negative)Secondary eDP AUX Channel (Negative)Secondary MIPI DSI Clock Pair (Negative) |
| S110 | GND | Ground | Module Signal & Power Return Ground |
| S111 | LVDS1_0+ / eDP1_TX0+ / DSI1_D0+ | Digital | Secondary LVDS Data Lane 0 (Positive)Secondary eDP Transmit Lane 0 (Positive)Secondary MIPI DSI Data Lane 0 (Positive) |
| S112 | LVDS1_0- / eDP1_TX0- / DSI1_D0- | Digital | Secondary LVDS Data Lane 0 (Negative)Secondary eDP Transmit Lane 0 (Negative)Secondary MIPI DSI Data Lane 0 (Negative) |
| S113 | eDP1_HPD / DSI1_TE | Digital | Secondary eDP Hot Plug Detect Input (1.8V CMOS)Secondary MIPI DSI Tearing Effect Input (1.8V CMOS) |
| S114 | LVDS1_1+ / eDP1_TX1+ / DSI1_D1+ | Digital | Secondary LVDS Data Lane 1 (Positive)Secondary eDP Transmit Lane 1 (Positive)Secondary MIPI DSI Data Lane 1 (Positive) |
| S115 | LVDS1_1- / eDP1_TX1- / DSI1_D1- | Digital | Secondary LVDS Data Lane 1 (Negative)Secondary eDP Transmit Lane 1 (Negative)Secondary MIPI DSI Data Lane 1 (Negative) |
| S116 | LCD1_VDD_EN | Digital | Secondary Panel Power Enable Output (1.8V CMOS) |
| S117 | LVDS1_2+ / eDP1_TX2+ / DSI1_D2+ | Digital | Secondary LVDS Data Lane 2 (Positive)Secondary eDP Transmit Lane 2 (Positive)Secondary MIPI DSI Data Lane 2 (Positive) |
| S118 | LVDS1_2- / eDP1_TX2- / DSI1_D2- | Digital | Secondary LVDS Data Lane 2 (Negative)Secondary eDP Transmit Lane 2 (Negative)Secondary MIPI DSI Data Lane 2 (Negative) |
| S119 | GND | Ground | Module Signal & Power Return Ground |
| S120 | LVDS1_3+ / eDP1_TX3+ / DSI1_D3+ | Digital | Secondary LVDS Data Lane 3 (Positive)Secondary eDP Transmit Lane 3 (Positive)Secondary MIPI DSI Data Lane 3 (Positive) |
| S121 | LVDS1_3- / eDP1_TX3- / DSI1_D3- | Digital | Secondary LVDS Data Lane 3 (Negative)Secondary eDP Transmit Lane 3 (Negative)Secondary MIPI DSI Data Lane 3 (Negative) |
| S122 | LCD1_BKLT_PWM | Digital | Secondary Panel Brightness PWM Control (1.8V CMOS) |
| S123 | GPIO13 | Digital | General Purpose I/O 13 (1.8V CMOS, Input) |
| S124 | GND | Ground | Module Signal & Power Return Ground |
| S125 | LVDS0_0+ / eDP0_TX0+ / DSI0_D0+ | Digital | Primary LVDS Data Lane 0 (Positive)Primary eDP Transmit Lane 0 (Positive)Primary MIPI DSI Data Lane 0 (Positive) |
| S126 | LVDS0_0- / eDP0_TX0- / DSI0_D0- | Digital | Primary LVDS Data Lane 0 (Negative)Primary eDP Transmit Lane 0 (Negative)Primary MIPI DSI Data Lane 0 (Negative) |
| S127 | LCD0_BKLT_EN | Digital | Primary Panel Backlight Enable Output (1.8V CMOS) |
| S128 | LVDS0_1+ / eDP0_TX1+ / DSI0_D1+ | Digital | Primary LVDS Data Lane 1 (Positive)Primary eDP Transmit Lane 1 (Positive)Primary MIPI DSI Data Lane 1 (Positive) |
| S129 | LVDS0_1- / eDP0_TX1- / DSI0_D1- | Digital | Primary LVDS Data Lane 1 (Negative)Primary eDP Transmit Lane 1 (Negative)Primary MIPI DSI Data Lane 1 (Negative) |
| S130 | GND | Ground | Module Signal & Power Return Ground |
| S131 | LVDS0_2+ / eDP0_TX2+ / DSI0_D2+ | Digital | Primary LVDS Data Lane 2 (Positive)Primary eDP Transmit Lane 2 (Positive)Primary MIPI DSI Data Lane 2 (Positive) |
| S132 | LVDS0_2- / eDP0_TX2- / DSI0_D2- | Digital | Primary LVDS Data Lane 2 (Negative)Primary eDP Transmit Lane 2 (Negative)Primary MIPI DSI Data Lane 2 (Negative) |
| S133 | LCD0_VDD_EN | Digital | Primary Panel Power Enable Output (1.8V CMOS) |
| S134 | LVDS0_CK+ / eDP0_AUX+ / DSI0_CLK+ | Digital | Primary LVDS Channel Clock Pair (Positive)Primary eDP AUX Channel (Positive)Primary MIPI DSI Clock Pair (Positive) |
| S135 | LVDS0_CK- / eDP0_AUX- / DSI0_CLK- | Digital | Primary LVDS Channel Clock Pair (Negative)Primary eDP AUX Channel (Negative)Primary MIPI DSI Clock Pair (Negative) |
| S136 | GND | Ground | Module Signal & Power Return Ground |
| S137 | LVDS0_3+ / eDP0_TX3+ / DSI0_D3+ | Digital | Primary LVDS Data Lane 3 (Positive)Primary eDP Transmit Lane 3 (Positive)Primary MIPI DSI Data Lane 3 (Positive) |
| S138 | LVDS0_3- / eDP0_TX3- / DSI0_D3- | Digital | Primary LVDS Data Lane 3 (Negative)Primary eDP Transmit Lane 3 (Negative)Primary MIPI DSI Data Lane 3 (Negative) |
| S139 | I2C_LCD_CK | Digital | Flat Panel EDID / DDC I2C Clock (1.8V OD CMOS) |
| S140 | I2C_LCD_DAT | Digital | Flat Panel EDID / DDC I2C Data (1.8V OD CMOS) |
| S141 | LCD0_BKLT_PWM | Digital | Primary Panel Brightness PWM Control (1.8V CMOS) |
| S142 | GPIO12 | Digital | General Purpose I/O 12 (1.8V CMOS, Input) |
| S143 | GND | Ground | Module Signal & Power Return Ground |
| S144 | eDP0_HPD / DSI0_TE | Digital | Primary eDP Hot Plug Detect Input (1.8V CMOS)Primary MIPI DSI Tearing Effect Input (1.8V CMOS) |
| S145 | WDT_TIME_OUT# | Digital | Watchdog Timer Output (1.8V CMOS, Active Low) |
| S146 | PCIE_WAKE# | Digital | PCIe Wake Up Interrupt to Host (3.3V OD CMOS, Active Low) |
| S147 | VDD_RTC | Power | RTC Low Current Backup Power (+2.0V to +3.25V DC) |
| S148 | LID# | Digital | Lid Open / Close Indication Input (1.8V to 5V OD, Active Low) |
| S149 | SLEEP# | Digital | Sleep Indicator Input from Carrier (1.8V to 5V OD, Active Low) |
| S150 | VIN_PWR_BAD# | Digital | Power Bad Indication from Carrier (VDD_IN Level OD CMOS, Active Low) |
| S151 | CHARGING# | Digital | Battery Charging Status Indicator (1.8V to 5V OD, Active Low) |
| S152 | CHARGER_PRSNT# | Digital | Battery Charger DC Input Present (1.8V to 5V OD, Active Low) |
| S153 | CARRIER_STBY# | Digital | Carrier Standby Power State Indicator Output (1.8V CMOS, Active Low) |
| S154 | CARRIER_PWR_ON | Digital | Carrier Board Power Enable Output (1.8V CMOS, Active High) |
| S155 | FORCE_RECOV# | Digital | Force Recovery Input Strap (1.8V OD CMOS, Active Low) |
| S156 | BATLOW# | Digital | Battery Low Indication Input to Module (1.8V to 5V OD, Active Low) |
| S157 | TEST# | Digital | Module Vendor Specific Test Mode (Leave Floating, Active Low) |
| S158 | GND | Ground | Module Signal & Power Return Ground |