PCF8591 8-Bit 4-Channel ADC and 1-Channel DAC (I2C)
Single-chip, single-supply low-power 8-bit data acquisition device with four analog inputs, one analog output (DAC), and an I2C-bus interface.
Aliase:PCF8591P, PCF8591T, I2C ADC DAC Module
DIP-16 / SO16 Top View
16 Pins
Pinout Table16
| Pin | Signal / Name | Type | Alternative Functions |
|---|---|---|---|
| 1 | AIN0 | Analog | Analog Input 0 (8-bit successive approximation ADC; 0V to VREF range) |
| 2 | AIN1 | Analog | Analog Input 1 |
| 3 | AIN2 | Analog | Analog Input 2 |
| 4 | AIN3 | Analog | Analog Input 3 (can also be used as negative reference for differential/pseudo-differential modes) |
| 5 | A0 | Digital | I2C Address Bit 0 — sets bit 0 of device address; base address 0x48; A0=A1=A2=0 → 0x48 |
| 6 | A1 | Digital | I2C Address Bit 1 — sets bit 1 of device address; range 0x48–0x4F |
| 7 | A2 | Digital | I2C Address Bit 2 — sets bit 2 of device address |
| 8 | VSS | Ground | Ground Reference (0V) |
| 9 | SDA | Digital | I2C Serial Data Line |
| 10 | SCL | Digital | I2C Serial Clock Line (max 100 kHz) |
| 11 | OSC | Digital | Oscillator Input — connect external clock when EXT=HIGH; leave open for internal oscillatorOscillator Output — when EXT=LOW (internal osc), this pin outputs the internal clock signal |
| 12 | EXT | Digital | External Oscillator Select — LOW: uses internal oscillator; HIGH: uses external clock at OSC pin; connect to VSS for normal use |
| 13 | AGND | Ground | Analog Ground Reference (connect to VSS; keep separate from digital ground if noise-sensitive) |
| 14 | VREF | Power | Analog Reference Voltage — sets full-scale range for ADC and DAC; typically tied to VDD; decouple with 100nF to AGND |
| 15 | AOUT | Analog | Analog Output (8-bit R-2R DAC) — 0 to VREF range; output enabled by DAC enable bit in control byte |
| 16 | VDD | Power | Supply Voltage (+2.5V to +6.0V DC) |