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Module2024SGeT e.V.

OSM Size-0 (Rev. 1.2) Pinout

SGeT Open Standard Module (OSM) V1.2 Size-0 (Zero, 30×15 mm) pinout specification with 188 LGA solder contacts for ultra-compact embedded IoT modules.

Aliase:OSM, Open Standard Module, OSM Size-0, OSM-0, OSM-0F, SGeT OSM, Size Zero
SGeT OSM Specification V1.2 (PDF)SGeT e.V. Standardization Group

OSM Size-0 (30×15mm)

188 Pins
13131414151516161717181819192020212122222323AABBCCDDEEFFGGHHJJKKLLMMNNPPRRTTUUVVWWYYAAAAABABACACA14: UART_A_RX (Asynchronous serial data input port A (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))A15: COM_AREA_01 (Antenna Ground)A16: COM_AREA_02 (LINK LED Channel 1 (O OD CMOS, 3.3V))A17: COM_AREA_03 (Antenna Ground)A18: COM_AREA_04 (SYNC Trigger Signal Channel 0 (O CMOS, 3.3V))A19: COM_AREA_05 (Antenna Ground)A20: COM_AREA_06 (Antenna Auxiliary Signal)A21: COM_AREA_07 (Antenna Ground)A22: UART_C_RX (Asynchronous serial data input port C (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))B13: UART_A_TX (Asynchronous serial data output port A (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))B15: COM_AREA_08 (Antenna Ground)B16: COM_AREA_09 (ACT LED Channel 1 (O OD CMOS, 3.3V))B17: COM_AREA_10 (Antenna Ground)B18: COM_AREA_11 (SYNC Trigger Signal Channel 1 (O CMOS, 3.3V))B19: COM_AREA_12 (Antenna Ground)B20: COM_AREA_13 (ACT LED Channel 0 (O OD CMOS, 3.3V))B21: COM_AREA_14 (Antenna Ground)B22: Vendor Defined (Defined by module manufacturer)B23: UART_C_TX (Asynchronous serial data output port C (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))C13: UART_A_RTS ("Request to Send" handshake line for port A (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))C14: UART_A_CTS ("Clear to Send" handshake line for port A (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))C15: COM_AREA_15 (Main antenna test point)C16: Vendor Defined (Defined by module manufacturer)C17: COM_AREA_16 (Main antenna test point)C18: TEST_GENERIC (General purpose for testing (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, The TEST_GENERIC function should be specified by module vendor.))C19: COM_AREA_17 (Auxiliary antenna test point)C20: SDIO_A_IOPWR (SDIO A Voltage. It is used to provide the IO Voltage Level (PO, 1.8V or 3.3V, PU/PD: Minimum current: 100mA))C21: COM_AREA_18 (Auxiliary antenna test point)C22: UART_D_RX (Asynchronous serial data input port D (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))C23: UART_D_TX (Asynchronous serial data output port D (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))D13: UART_B_TX (Asynchronous serial data output port B (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))D14: UART_B_RX (Asynchronous serial data input port B (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))D15: UART_B_RTS ("Request to Send" handshake line for port B (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))D16: UART_B_CTS ("Clear to Send" handshake line for port B (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))D17: GPIO_A_0 (General purpose I/O Contact A0 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))D18: GND (Module Signal and power return and GND reference (P))D19: GPIO_B_0 (General purpose I/O Contact B0 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))D20: SDIO_A_WP (SDIO A Write Protect. This signal denotes the state of the write- protect tab on SD cards. (I OD CMOS, 1.8V or 3.3V, PU/PD: PU 10k, Tie to GND on carrier, if not used))D21: SDIO_A_PWR_EN (SDIO A Power Enable. This signal is used to enable the power being supplied to a SD/MMC card device. (O CMOS, 1.8V or 3.3V))D22: UART_CON_RX (Asynchronous serial data input port console (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))D23: UART_CON_TX (Asynchronous serial data output port console (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))E15: GND (Module Signal and power return and GND reference (P))E16: ETH_A_(R)(G)MII_CRS (Carrier Sense port A (I CMOS, 1.8V/2.5V/3.3V))E17: GPIO_A_1 (General purpose I/O Contact A1 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))E18: PWM_0/ DISP_BL_PWM (Primary Display brightness control through pulse width modulation (O CMOS, 1.8V))E19: GPIO_B_1 (General purpose I/O Contact B1 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))E20: SDIO_A_CMD (SDIO A Command/Response. This signal is used for card initialization and for command transfers. During initialization mode this signal is open drain. During command transfer this signal is in push-pull mode. (I/O CMOS, 1.8V or 3.3V))E21: GND (Module Signal and power return and GND reference (P))F15: ETH_A_(R)(G)MII_COL (Collision detect (half speed only) port A (I CMOS, 1.8V/2.5V/3.3V))F16: GND (Module Signal and power return and GND reference (P))F17: GPIO_A_2 (General purpose I/O Contact A2 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))F18: PWM_1 (Pulse width modulation 1 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))F19: GPIO_B_2 (General purpose I/O Contact B2 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))F20: GND (Module Signal and power return and GND reference (P))F21: SDIO_A_CLK (SDIO A Clock. With each cycle of this signal a one-bit transfer on the command and each data line occurs. (O CMOS, 1.8V or 3.3V))G15: ETH_A_(S)(R)(G)MII_TXD1 (Transmit data bit 1 port A (O CMOS, 1.8V/2.5V/3.3V, PU/PD: _N when used as differential))G16: ETH_A_(S)(R)(G)MII_TXD3 (Transmit data bit 3 port A (O CMOS, 1.8V/2.5V/3.3V, PU/PD: _N when used as differential))G17: GPIO_A_3 (General purpose I/O Contact A3 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))G18: PWM_2 (Pulse width modulation 2 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))G19: GPIO_B_3 (General purpose I/O Contact B3 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))G20: SDIO_A_D0 (SDIO A Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V))G21: SDIO_A_D1 (SDIO A Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V))H15: ETH_A_(S)(R)(G)MII_TXD0 (Transmit data bit 0 (transmitted first) port A (O CMOS, 1.8V/2.5V/3.3V, PU/PD: _P when used as differential))H16: ETH_A_(S)(R)(G)MII_TXD2 (Transmit data bit 2 port A (O CMOS, 1.8V/2.5V/3.3V, PU/PD: _P when used as differential))H17: GPIO_A_4 (General purpose I/O Contact A4 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))H18: PWM_3 (Pulse width modulation 3 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))H19: GPIO_B_4 (General purpose I/O Contact B4 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))H20: SDIO_A_D2 (SDIO A Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V))H21: SDIO_A_D3 (SDIO A Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V))J15: ETH_A_(R)(G)MII_TX_CLK (Transmit clock port A (I/O CMOS, 1.8V/2.5V/3.3V))J16: GND (Module Signal and power return and GND reference (P))J17: GPIO_A_5 (General purpose I/O Contact A5 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))J18: PWM_4 (Pulse width modulation 4 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))J19: GPIO_B_5 (General purpose I/O Contact B5 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))J20: GND (Module Signal and power return and GND reference (P))J21: SDIO_A_CD# (SDIO A Card Detect. This signal indicates when a SDIO/MMC card is present. (I OD CMOS, 1.8V or 3.3V, PU/PD: PU 10k))K15: ETH_A_(S)(R)(G)MII_RXD0 (Receive data bit 0 (received first) port A (I CMOS, 1.8V/2.5V/3.3V, PU/PD: _P when used as differential))K16: ETH_A_(R)(G)MII_TX_EN(_ER) (Transmit enable (Error) port A (O CMOS, 1.8V/2.5V/3.3V))K17: GPIO_A_6/ SPI_A_CS1# (General purpose I/O Contact A6 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, Dual function: SPI_A_CS1#))K18: PWM_5 (Pulse width modulation 5 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))K19: GPIO_B_6 (General purpose I/O Contact B6 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))K20: SDIO_B_CLK (SDIO B Clock. With each cycle of this signal a one-bit transfer on the command and each data line occurs. (O CMOS, 1.8V or 3.3V))K21: SDIO_B_CMD (SDIO B Command/Response. This signal is used for card initialization and for command transfers. During initialization mode (I/O CMOS, 1.8V or 3.3V))L15: ETH_A_(S)(R)(G)MII_RXD1 (Receive data bit 1 port A (I CMOS, 1.8V/2.5V/3.3V, PU/PD: _N when used as differential))L16: ETH_A_(R)(G)MII_RX_ER (Receive error port A (I CMOS, 1.8V/2.5V/3.3V))L17: GPIO_A_7/ SPI_B_CS1# (General purpose I/O Contact A7 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, Dual function: SPI_B_CS1#))L18: GND (Module Signal and power return and GND reference (P))L19: GPIO_B_7 (General purpose I/O Contact B7 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))L20: SDIO_B_D0 (SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V))L21: SDIO_B_D1 (SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V))M15: ETH_A_(R)(G)MII_RX_DV(_ER) (Receive data valid port A (I CMOS, 1.8V/2.5V/3.3V))M16: GND (Module Signal and power return and GND reference (P))M17: ETH_IOPWR (ETH voltage. It is used to provide the IO Voltage Level for all Ethernet interfaces. (PO, 1.8V/2.5V/3.3V, PU/PD: Minimum current: 100mA))M18: ADC_0 (Analog Digital Converter 0 (Analog, 0V – 1.8V))M19: VCC_2_TEST (Module power voltage testpoint (PO))M20: GND (Module Signal and power return and GND reference (P))M21: SDIO_B_D2 (SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V))N15: ETH_A_(R)(G)MII_RXD2 (Receive data bit 2 port A (I CMOS, 1.8V/2.5V/3.3V))N16: ETH_A_SDP (Ethernet port A System Defined Contact (I/O CMOS, 1.8V/2.5V/3.3V))N17: JTAG_TCK(SWCLK) (Test Clock (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))N18: ADC_1 (Analog Digital Converter 1 (Analog, 0V – 1.8V))N19: JTAG_TMS(SWDIO) (Test Mode Select (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))N20: SDIO_B_D3 (SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V))N21: SDIO_B_D4 (SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V))P15: ETH_A_(R)(G)MII_RXD3 (Receive data bit 3 port A (I CMOS, 1.8V/2.5V/3.3V))P16: Vendor Defined (Defined by module manufacturer)P17: JTAG_TDI (Test Data Input (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))P18: GND (Module Signal and power return and GND reference (P))P19: JTAG_RTCK (Returned Test Clock (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))P20: SDIO_B_D5 (SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V))P21: SDIO_B_D6 (SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V))R15: ETH_A_(R)(G)MII_RX_CLK (Receive clock port A (I/O CMOS, 1.8V/2.5V/3.3V))R16: GND (Module Signal and power return and GND reference (P))R17: JTAG_TDO(SWO) (Test Data Output (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))R18: BOOT_SEL1# (I OD CMOS (1.8V, PU 10k, PU/PD: The boot medium is the choice of the module vendor.))R19: JTAG_nTRST (Test Reset, Active Low (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))R20: GND (Module Signal and power return and GND reference (P))R21: SDIO_B_D7 (SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V))T15: ETH_MDIO (Management bus data signal for Ethernet (I/O CMOS, 1.8V/2.5V/3.3V, PU/PD: Can be used for all ETH ports or for A exclusively))T16: ETH_MDC (Management bus clock signal for Ethernet (O CMOS, 1.8V/2.5V/3.3V, PU/PD: Can be used for all ETH ports or for A exclusively))T17: FORCE_RECOVERY# (If low on carrier board module enters recovery mode. (I OD CMOS, 1.8V, PU/PD: PU 10k, The recovery mode should be specified by module vendor.))T18: I2S_B_LRCLK (I2S Left & Right synchronization clock (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, Module Output if CPU acts in Master Mode Module Input if CPU acts in Slave Mode))T19: I2S_B_BITCLK (I2S Digital audio clock (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, Module Output if CPU acts in Master Mode Module Input if CPU acts in Slave Mode))T20: SDIO_B_IOPWR (SDIO B Voltage. It is used to provide the IO Voltage Level (PO, 1.8V or 3.3V, PU/PD: Minimum current: 100mA))T21: SDIO_B_CD# (SDIO B Card Detect. This signal indicates when a SDIO/MMC card is present. (I OD CMOS, 1.8V or 3.3V, PU/PD: PU 10k))U15: SPI_A_SDI_(IO1) (SPI_A_SDI_(IO1))U16: SPI_A_SCK (SPI A Serial Data Clock (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))U17: RESET_IN# (Reset input from Carrier board. Carrier drives low to force a Module reset, floats the line otherwise. (I OD CMOS, 1.8V, PU/PD: PU 10K))U18: VCC_OUT_IO (Provides IO voltage level for several interfaces to connect (PO, 1.8V/3.3V, PU/PD: 1.8V/3.3V on size 0, 1.8V on all other sizes – minimum current: 100 mA))U19: BOOT_SEL0# (I OD CMOS (1.8V, PU 10k, PU/PD: The boot medium is the choice of the module vendor.))U20: SDIO_B_WP (SDIO B Write Protect. This signal denotes the state of the write- protect tab on SD cards. (I OD CMOS, 1.8V or 3.3V, PU/PD: PU 10k, Tie to GND on carrier, if not used))U21: SDIO_B_PWR_EN (SDIO B Power Enable. This signal is used to enable the power being supplied to a SD/MMC card device. (O CMOS, 1.8V or 3.3V))V15: SPI_A_SDO_(IO0) (SPI_A_SDO_(IO0))V16: GND (Module Signal and power return and GND reference (P))V17: CARRIER_PWR_EN (Carrier board circuits should not be powered up until the module asserts the CARRIER_PWR_EN signal (O CMOS, 1.8V))V18: I2S_MCLK (Master clock output to I2S codec(s) (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))V19: I2S_B_DATA_IN (I2S B Digital audio Input (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))V20: GND (Module Signal and power return and GND reference (P))V21: I2S_A_DATA_IN (I2S A Digital audio Input (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))W15: SPI_A_HOLD_(IO3) (SPI_A_HOLD_(IO3))W16: SPI_A_WP_(IO2) (SPI_A_WP_(IO2))W17: RTC_PWR (Low current RTC circuit backup power – 3.0V nominal. May be sourced from a Carrier based Lithium cell or Super Cap. (P, If RTC is implemented, Module Vendor should ensure proper function of RTC during active main supply if this pin is not used))W18: I2S_A_LRCLK (I2S Left & Right synchronization clock (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, Module Output if CPU acts in Master Mode Module Input if CPU acts in Slave Mode))W19: I2S_B_DATA_OUT (I2S B Digital audio Output (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))W20: I2S_A_BITCLK (I2S Digital audio clock (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, Module Output if CPU acts in Master Mode Module Input if CPU acts in Slave Mode))W21: I2S_A_DATA_OUT (I2S A Digital audio Output (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V))Y13: CARRIER_STBY# (The Module shall drive this signal low when the system is in a standby power state (O CMOS, 1.8V, PU/PD: Optional))Y14: RESET_OUT# (Reset output from CPU to reset peripherals on Carrier. (O CMOS, 1.8V))Y15: SPI_A_CS0# (SPI A Master Chip Select 0 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))Y16: VCC_3_TEST (Module power voltage testpoint (PO))Y17: VCC_IN_5V (Module power input voltage of 5V – Primary voltage rail for size S, M and L modules (P, Tolerance: 5V +-5%))Y18: GND (Module Signal and power return and GND reference (P))Y19: VCC_IN_3V3 (Module power input voltage of 3.3V – Primary voltage rail for 0 size modules (P, Tolerance: 3.3V +- 5%))Y20: VCC_4_TEST (Module power voltage testpoint (PO))Y21: SPI_B_SCK (SPI B Serial Data Clock (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))Y22: SPI_B_SDI (SPI B Serial Data Input (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))Y23: SPI_B_SDO (SPI B Serial Data Output (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))AA13: RESERVED (Reserved for future use (NC))AA14: GND (Module Signal and power return and GND reference (P))AA15: I2C_A_SCL (I2C Port A Clock Signal (I/O OD CMOS, VCC_OUT_IO, PU/PD: 1.8V, PU 2k2))AA16: I2C_A_SDA (I2C Port A Data Signal (I/O OD CMOS, VCC_OUT_IO, PU/PD: 1.8V, PU 2k2))AA17: GND (Module Signal and power return and GND reference (P))AA18: V_BAT (Module power input battery voltage (P))AA19: GND (Module Signal and power return and GND reference (P))AA20: I2C_B_SCL (I2C Port B Clock Signal (I/O OD CMOS, VCC_OUT_IO, PU/PD: 1.8V, PU 2k2))AA21: I2C_B_SDA (I2C Port B Data Signal (I/O OD CMOS, VCC_OUT_IO, PU/PD: 1.8V, PU 2k2))AA22: GND (Module Signal and power return and GND reference (P))AA23: SPI_B_CS0# (SPI B Master Chip Select 0 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))AB13: USB_A_D_N (USB differential data pairs for port A (I/O USB, USB))AB14: USB_A_ID (Input Contact to announce OTG device insertion on USB 2.0 port (I OD CMOS, 1.8V, PU/PD: PU 10k))AB15: GND (Module Signal and power return and GND reference (P))AB16: USB_A_VBUS (USB port 0 port power detection (I USB VBUS 5V, USB VBUS 5V))AB17: CAN_A_RX (CAN port A Receive input (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))AB18: V_BAT (Module power input battery voltage (P))AB19: CAN_B_RX (CAN port B Receive input (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))AB20: USB_B_VBUS (USB port 0 port power detection (I USB VBUS 5V, USB VBUS 5V))AB21: GND (Module Signal and power return and GND reference (P))AB22: USB_B_ID (Input Contact to announce OTG device insertion on USB 2.0 port (I OD CMOS, 1.8V, PU/PD: PU 10k))AB23: USB_B_D_N (USB differential data pairs for port B (I/O USB, USB))AC14: USB_A_D_P (USB differential data pairs for port A (I/O USB, USB))AC15: USB_A_OC# (USB over-current for port A (I OD CMOS, 1.8V, PU/PD: PU 10k))AC16: USB_A_EN (Power enable for USB VBUS voltage (O CMOS, 1.8V))AC17: CAN_A_TX (CAN port A Transmit output (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))AC18: DEBUG_EN (Enables JTAG function (I CMOS, VCC_OUT_IO, PU/PD: 1.8V))AC19: CAN_B_TX (CAN port B Transmit output (O CMOS, VCC_OUT_IO, PU/PD: 1.8V))AC20: USB_B_EN (Power enable for USB VBUS voltage (O CMOS, 1.8V))AC21: USB_B_OC# (USB over-current for port B (I OD CMOS, 1.8V, PU/PD: PU 10k))AC22: USB_B_D_P (USB differential data pairs for port B (I/O USB, USB))pinoutdb.org
Pinout Table188
PinSignal / NameTypeAlternative Functions
A14UART_A_RXDigital
Asynchronous serial data input port A (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
A15COM_AREA_01Digital
Antenna Ground
A16COM_AREA_02Digital
LINK LED Channel 1 (O OD CMOS, 3.3V)
A17COM_AREA_03Digital
Antenna Ground
A18COM_AREA_04Digital
SYNC Trigger Signal Channel 0 (O CMOS, 3.3V)
A19COM_AREA_05Digital
Antenna Ground
A20COM_AREA_06Digital
Antenna Auxiliary Signal
A21COM_AREA_07Digital
Antenna Ground
A22UART_C_RXDigital
Asynchronous serial data input port C (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
B13UART_A_TXDigital
Asynchronous serial data output port A (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
B15COM_AREA_08Digital
Antenna Ground
B16COM_AREA_09Digital
ACT LED Channel 1 (O OD CMOS, 3.3V)
B17COM_AREA_10Digital
Antenna Ground
B18COM_AREA_11Digital
SYNC Trigger Signal Channel 1 (O CMOS, 3.3V)
B19COM_AREA_12Digital
Antenna Ground
B20COM_AREA_13Digital
ACT LED Channel 0 (O OD CMOS, 3.3V)
B21COM_AREA_14Digital
Antenna Ground
B22Vendor DefinedDigital
Defined by module manufacturer
B23UART_C_TXDigital
Asynchronous serial data output port C (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
C13UART_A_RTSDigital
"Request to Send" handshake line for port A (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
C14UART_A_CTSDigital
"Clear to Send" handshake line for port A (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
C15COM_AREA_15Digital
Main antenna test point
C16Vendor DefinedDigital
Defined by module manufacturer
C17COM_AREA_16Digital
Main antenna test point
C18TEST_GENERICDigital
General purpose for testing (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, The TEST_GENERIC function should be specified by module vendor.)
C19COM_AREA_17Digital
Auxiliary antenna test point
C20SDIO_A_IOPWRPower
SDIO A Voltage. It is used to provide the IO Voltage Level (PO, 1.8V or 3.3V, PU/PD: Minimum current: 100mA)
C21COM_AREA_18Digital
Auxiliary antenna test point
C22UART_D_RXDigital
Asynchronous serial data input port D (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
C23UART_D_TXDigital
Asynchronous serial data output port D (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
D13UART_B_TXDigital
Asynchronous serial data output port B (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
D14UART_B_RXDigital
Asynchronous serial data input port B (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
D15UART_B_RTSDigital
"Request to Send" handshake line for port B (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
D16UART_B_CTSDigital
"Clear to Send" handshake line for port B (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
D17GPIO_A_0Digital
General purpose I/O Contact A0 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
D18GNDGround
Module Signal and power return and GND reference (P)
D19GPIO_B_0Digital
General purpose I/O Contact B0 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
D20SDIO_A_WPDigital
SDIO A Write Protect. This signal denotes the state of the write- protect tab on SD cards. (I OD CMOS, 1.8V or 3.3V, PU/PD: PU 10k, Tie to GND on carrier, if not used)
D21SDIO_A_PWR_ENDigital
SDIO A Power Enable. This signal is used to enable the power being supplied to a SD/MMC card device. (O CMOS, 1.8V or 3.3V)
D22UART_CON_RXDigital
Asynchronous serial data input port console (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
D23UART_CON_TXDigital
Asynchronous serial data output port console (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
E15GNDGround
Module Signal and power return and GND reference (P)
E16ETH_A_(R)(G)MII_CRSDigital
Carrier Sense port A (I CMOS, 1.8V/2.5V/3.3V)
E17GPIO_A_1Digital
General purpose I/O Contact A1 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
E18PWM_0/ DISP_BL_PWMDigital
Primary Display brightness control through pulse width modulation (O CMOS, 1.8V)
E19GPIO_B_1Digital
General purpose I/O Contact B1 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
E20SDIO_A_CMDDigital
SDIO A Command/Response. This signal is used for card initialization and for command transfers. During initialization mode this signal is open drain. During command transfer this signal is in push-pull mode. (I/O CMOS, 1.8V or 3.3V)
E21GNDGround
Module Signal and power return and GND reference (P)
F15ETH_A_(R)(G)MII_COLDigital
Collision detect (half speed only) port A (I CMOS, 1.8V/2.5V/3.3V)
F16GNDGround
Module Signal and power return and GND reference (P)
F17GPIO_A_2Digital
General purpose I/O Contact A2 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
F18PWM_1Digital
Pulse width modulation 1 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
F19GPIO_B_2Digital
General purpose I/O Contact B2 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
F20GNDGround
Module Signal and power return and GND reference (P)
F21SDIO_A_CLKDigital
SDIO A Clock. With each cycle of this signal a one-bit transfer on the command and each data line occurs. (O CMOS, 1.8V or 3.3V)
G15ETH_A_(S)(R)(G)MII_TXD1Digital
Transmit data bit 1 port A (O CMOS, 1.8V/2.5V/3.3V, PU/PD: _N when used as differential)
G16ETH_A_(S)(R)(G)MII_TXD3Digital
Transmit data bit 3 port A (O CMOS, 1.8V/2.5V/3.3V, PU/PD: _N when used as differential)
G17GPIO_A_3Digital
General purpose I/O Contact A3 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
G18PWM_2Digital
Pulse width modulation 2 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
G19GPIO_B_3Digital
General purpose I/O Contact B3 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
G20SDIO_A_D0Digital
SDIO A Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V)
G21SDIO_A_D1Digital
SDIO A Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V)
H15ETH_A_(S)(R)(G)MII_TXD0Digital
Transmit data bit 0 (transmitted first) port A (O CMOS, 1.8V/2.5V/3.3V, PU/PD: _P when used as differential)
H16ETH_A_(S)(R)(G)MII_TXD2Digital
Transmit data bit 2 port A (O CMOS, 1.8V/2.5V/3.3V, PU/PD: _P when used as differential)
H17GPIO_A_4Digital
General purpose I/O Contact A4 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
H18PWM_3Digital
Pulse width modulation 3 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
H19GPIO_B_4Digital
General purpose I/O Contact B4 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
H20SDIO_A_D2Digital
SDIO A Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V)
H21SDIO_A_D3Digital
SDIO A Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V)
J15ETH_A_(R)(G)MII_TX_CLKDigital
Transmit clock port A (I/O CMOS, 1.8V/2.5V/3.3V)
J16GNDGround
Module Signal and power return and GND reference (P)
J17GPIO_A_5Digital
General purpose I/O Contact A5 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
J18PWM_4Digital
Pulse width modulation 4 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
J19GPIO_B_5Digital
General purpose I/O Contact B5 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
J20GNDGround
Module Signal and power return and GND reference (P)
J21SDIO_A_CD#Digital
SDIO A Card Detect. This signal indicates when a SDIO/MMC card is present. (I OD CMOS, 1.8V or 3.3V, PU/PD: PU 10k)
K15ETH_A_(S)(R)(G)MII_RXD0Digital
Receive data bit 0 (received first) port A (I CMOS, 1.8V/2.5V/3.3V, PU/PD: _P when used as differential)
K16ETH_A_(R)(G)MII_TX_EN(_ER)Digital
Transmit enable (Error) port A (O CMOS, 1.8V/2.5V/3.3V)
K17GPIO_A_6/ SPI_A_CS1#Digital
General purpose I/O Contact A6 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, Dual function: SPI_A_CS1#)
K18PWM_5Digital
Pulse width modulation 5 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
K19GPIO_B_6Digital
General purpose I/O Contact B6 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
K20SDIO_B_CLKDigital
SDIO B Clock. With each cycle of this signal a one-bit transfer on the command and each data line occurs. (O CMOS, 1.8V or 3.3V)
K21SDIO_B_CMDDigital
SDIO B Command/Response. This signal is used for card initialization and for command transfers. During initialization mode (I/O CMOS, 1.8V or 3.3V)
L15ETH_A_(S)(R)(G)MII_RXD1Digital
Receive data bit 1 port A (I CMOS, 1.8V/2.5V/3.3V, PU/PD: _N when used as differential)
L16ETH_A_(R)(G)MII_RX_ERDigital
Receive error port A (I CMOS, 1.8V/2.5V/3.3V)
L17GPIO_A_7/ SPI_B_CS1#Digital
General purpose I/O Contact A7 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, Dual function: SPI_B_CS1#)
L18GNDGround
Module Signal and power return and GND reference (P)
L19GPIO_B_7Digital
General purpose I/O Contact B7 (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
L20SDIO_B_D0Digital
SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V)
L21SDIO_B_D1Digital
SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V)
M15ETH_A_(R)(G)MII_RX_DV(_ER)Digital
Receive data valid port A (I CMOS, 1.8V/2.5V/3.3V)
M16GNDGround
Module Signal and power return and GND reference (P)
M17ETH_IOPWRPower
ETH voltage. It is used to provide the IO Voltage Level for all Ethernet interfaces. (PO, 1.8V/2.5V/3.3V, PU/PD: Minimum current: 100mA)
M18ADC_0Analog
Analog Digital Converter 0 (Analog, 0V – 1.8V)
M19VCC_2_TESTPower
Module power voltage testpoint (PO)
M20GNDGround
Module Signal and power return and GND reference (P)
M21SDIO_B_D2Digital
SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V)
N15ETH_A_(R)(G)MII_RXD2Digital
Receive data bit 2 port A (I CMOS, 1.8V/2.5V/3.3V)
N16ETH_A_SDPDigital
Ethernet port A System Defined Contact (I/O CMOS, 1.8V/2.5V/3.3V)
N17JTAG_TCK(SWCLK)Digital
Test Clock (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
N18ADC_1Analog
Analog Digital Converter 1 (Analog, 0V – 1.8V)
N19JTAG_TMS(SWDIO)Digital
Test Mode Select (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
N20SDIO_B_D3Digital
SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V)
N21SDIO_B_D4Digital
SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V)
P15ETH_A_(R)(G)MII_RXD3Digital
Receive data bit 3 port A (I CMOS, 1.8V/2.5V/3.3V)
P16Vendor DefinedDigital
Defined by module manufacturer
P17JTAG_TDIDigital
Test Data Input (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
P18GNDGround
Module Signal and power return and GND reference (P)
P19JTAG_RTCKDigital
Returned Test Clock (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
P20SDIO_B_D5Digital
SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V)
P21SDIO_B_D6Digital
SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V)
R15ETH_A_(R)(G)MII_RX_CLKDigital
Receive clock port A (I/O CMOS, 1.8V/2.5V/3.3V)
R16GNDGround
Module Signal and power return and GND reference (P)
R17JTAG_TDO(SWO)Digital
Test Data Output (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
R18BOOT_SEL1#Digital
I OD CMOS (1.8V, PU 10k, PU/PD: The boot medium is the choice of the module vendor.)
R19JTAG_nTRSTDigital
Test Reset, Active Low (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
R20GNDGround
Module Signal and power return and GND reference (P)
R21SDIO_B_D7Digital
SDIO B Data lines. These signals operate in push-pull mode. (I/O CMOS, 1.8V or 3.3V)
T15ETH_MDIODigital
Management bus data signal for Ethernet (I/O CMOS, 1.8V/2.5V/3.3V, PU/PD: Can be used for all ETH ports or for A exclusively)
T16ETH_MDCDigital
Management bus clock signal for Ethernet (O CMOS, 1.8V/2.5V/3.3V, PU/PD: Can be used for all ETH ports or for A exclusively)
T17FORCE_RECOVERY#Digital
If low on carrier board module enters recovery mode. (I OD CMOS, 1.8V, PU/PD: PU 10k, The recovery mode should be specified by module vendor.)
T18I2S_B_LRCLKDigital
I2S Left & Right synchronization clock (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, Module Output if CPU acts in Master Mode Module Input if CPU acts in Slave Mode)
T19I2S_B_BITCLKDigital
I2S Digital audio clock (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, Module Output if CPU acts in Master Mode Module Input if CPU acts in Slave Mode)
T20SDIO_B_IOPWRPower
SDIO B Voltage. It is used to provide the IO Voltage Level (PO, 1.8V or 3.3V, PU/PD: Minimum current: 100mA)
T21SDIO_B_CD#Digital
SDIO B Card Detect. This signal indicates when a SDIO/MMC card is present. (I OD CMOS, 1.8V or 3.3V, PU/PD: PU 10k)
U15SPI_A_SDI_(IO1)Digital
SPI_A_SDI_(IO1)
U16SPI_A_SCKDigital
SPI A Serial Data Clock (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
U17RESET_IN#Digital
Reset input from Carrier board. Carrier drives low to force a Module reset, floats the line otherwise. (I OD CMOS, 1.8V, PU/PD: PU 10K)
U18VCC_OUT_IOPower
Provides IO voltage level for several interfaces to connect (PO, 1.8V/3.3V, PU/PD: 1.8V/3.3V on size 0, 1.8V on all other sizes – minimum current: 100 mA)
U19BOOT_SEL0#Digital
I OD CMOS (1.8V, PU 10k, PU/PD: The boot medium is the choice of the module vendor.)
U20SDIO_B_WPDigital
SDIO B Write Protect. This signal denotes the state of the write- protect tab on SD cards. (I OD CMOS, 1.8V or 3.3V, PU/PD: PU 10k, Tie to GND on carrier, if not used)
U21SDIO_B_PWR_ENDigital
SDIO B Power Enable. This signal is used to enable the power being supplied to a SD/MMC card device. (O CMOS, 1.8V or 3.3V)
V15SPI_A_SDO_(IO0)Digital
SPI_A_SDO_(IO0)
V16GNDGround
Module Signal and power return and GND reference (P)
V17CARRIER_PWR_ENDigital
Carrier board circuits should not be powered up until the module asserts the CARRIER_PWR_EN signal (O CMOS, 1.8V)
V18I2S_MCLKDigital
Master clock output to I2S codec(s) (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
V19I2S_B_DATA_INDigital
I2S B Digital audio Input (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
V20GNDGround
Module Signal and power return and GND reference (P)
V21I2S_A_DATA_INDigital
I2S A Digital audio Input (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
W15SPI_A_HOLD_(IO3)Digital
SPI_A_HOLD_(IO3)
W16SPI_A_WP_(IO2)Digital
SPI_A_WP_(IO2)
W17RTC_PWRPower
Low current RTC circuit backup power – 3.0V nominal. May be sourced from a Carrier based Lithium cell or Super Cap. (P, If RTC is implemented, Module Vendor should ensure proper function of RTC during active main supply if this pin is not used)
W18I2S_A_LRCLKDigital
I2S Left & Right synchronization clock (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, Module Output if CPU acts in Master Mode Module Input if CPU acts in Slave Mode)
W19I2S_B_DATA_OUTDigital
I2S B Digital audio Output (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
W20I2S_A_BITCLKDigital
I2S Digital audio clock (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V, Module Output if CPU acts in Master Mode Module Input if CPU acts in Slave Mode)
W21I2S_A_DATA_OUTDigital
I2S A Digital audio Output (I/O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
Y13CARRIER_STBY#Digital
The Module shall drive this signal low when the system is in a standby power state (O CMOS, 1.8V, PU/PD: Optional)
Y14RESET_OUT#Digital
Reset output from CPU to reset peripherals on Carrier. (O CMOS, 1.8V)
Y15SPI_A_CS0#Digital
SPI A Master Chip Select 0 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
Y16VCC_3_TESTPower
Module power voltage testpoint (PO)
Y17VCC_IN_5VPower
Module power input voltage of 5V – Primary voltage rail for size S, M and L modules (P, Tolerance: 5V +-5%)
Y18GNDGround
Module Signal and power return and GND reference (P)
Y19VCC_IN_3V3Power
Module power input voltage of 3.3V – Primary voltage rail for 0 size modules (P, Tolerance: 3.3V +- 5%)
Y20VCC_4_TESTPower
Module power voltage testpoint (PO)
Y21SPI_B_SCKDigital
SPI B Serial Data Clock (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
Y22SPI_B_SDIDigital
SPI B Serial Data Input (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
Y23SPI_B_SDODigital
SPI B Serial Data Output (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
AA13RESERVEDNC
Reserved for future use (NC)
AA14GNDGround
Module Signal and power return and GND reference (P)
AA15I2C_A_SCLDigital
I2C Port A Clock Signal (I/O OD CMOS, VCC_OUT_IO, PU/PD: 1.8V, PU 2k2)
AA16I2C_A_SDADigital
I2C Port A Data Signal (I/O OD CMOS, VCC_OUT_IO, PU/PD: 1.8V, PU 2k2)
AA17GNDGround
Module Signal and power return and GND reference (P)
AA18V_BATPower
Module power input battery voltage (P)
AA19GNDGround
Module Signal and power return and GND reference (P)
AA20I2C_B_SCLDigital
I2C Port B Clock Signal (I/O OD CMOS, VCC_OUT_IO, PU/PD: 1.8V, PU 2k2)
AA21I2C_B_SDADigital
I2C Port B Data Signal (I/O OD CMOS, VCC_OUT_IO, PU/PD: 1.8V, PU 2k2)
AA22GNDGround
Module Signal and power return and GND reference (P)
AA23SPI_B_CS0#Digital
SPI B Master Chip Select 0 (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
AB13USB_A_D_NDigital
USB differential data pairs for port A (I/O USB, USB)
AB14USB_A_IDDigital
Input Contact to announce OTG device insertion on USB 2.0 port (I OD CMOS, 1.8V, PU/PD: PU 10k)
AB15GNDGround
Module Signal and power return and GND reference (P)
AB16USB_A_VBUSDigital
USB port 0 port power detection (I USB VBUS 5V, USB VBUS 5V)
AB17CAN_A_RXDigital
CAN port A Receive input (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
AB18V_BATPower
Module power input battery voltage (P)
AB19CAN_B_RXDigital
CAN port B Receive input (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
AB20USB_B_VBUSDigital
USB port 0 port power detection (I USB VBUS 5V, USB VBUS 5V)
AB21GNDGround
Module Signal and power return and GND reference (P)
AB22USB_B_IDDigital
Input Contact to announce OTG device insertion on USB 2.0 port (I OD CMOS, 1.8V, PU/PD: PU 10k)
AB23USB_B_D_NDigital
USB differential data pairs for port B (I/O USB, USB)
AC14USB_A_D_PDigital
USB differential data pairs for port A (I/O USB, USB)
AC15USB_A_OC#Digital
USB over-current for port A (I OD CMOS, 1.8V, PU/PD: PU 10k)
AC16USB_A_ENDigital
Power enable for USB VBUS voltage (O CMOS, 1.8V)
AC17CAN_A_TXDigital
CAN port A Transmit output (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
AC18DEBUG_ENDigital
Enables JTAG function (I CMOS, VCC_OUT_IO, PU/PD: 1.8V)
AC19CAN_B_TXDigital
CAN port B Transmit output (O CMOS, VCC_OUT_IO, PU/PD: 1.8V)
AC20USB_B_ENDigital
Power enable for USB VBUS voltage (O CMOS, 1.8V)
AC21USB_B_OC#Digital
USB over-current for port B (I OD CMOS, 1.8V, PU/PD: PU 10k)
AC22USB_B_D_PDigital
USB differential data pairs for port B (I/O USB, USB)

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