CD4017B Decade Counter with 10 Decoded Outputs
5-stage Johnson counter with 10 decoded outputs. Advances on rising clock edge. 3–18V supply. Used in LED chasers, sequencers, and frequency dividers.
Aliase:HEF4017B, MC14017B, CMOS Decade Counter, Johnson Counter
DIP-16 Top View
16 Pins
Pinout Table16
| Pin | Signal / Name | Type | Alternative Functions |
|---|---|---|---|
| 1 | Q5 | Digital | Decoded Output 5 (HIGH on 6th clock count) |
| 2 | Q1 | Digital | Decoded Output 1 (HIGH on 2nd clock count) |
| 3 | Q0 | Digital | Decoded Output 0 (HIGH on 1st clock count / reset) |
| 4 | Q2 | Digital | Decoded Output 2 (HIGH on 3rd clock count) |
| 5 | Q6 | Digital | Decoded Output 6 (HIGH on 7th clock count) |
| 6 | Q7 | Digital | Decoded Output 7 (HIGH on 8th clock count) |
| 7 | Q3 | Digital | Decoded Output 3 (HIGH on 4th clock count) |
| 8 | VSS | Ground | System Ground (0V) |
| 9 | Q8 | Digital | Decoded Output 8 (HIGH on 9th clock count) |
| 10 | Q4 | Digital | Decoded Output 4 (HIGH on 5th clock count) |
| 11 | Q9 | Digital | Decoded Output 9 (HIGH on 10th clock count) |
| 12 | CO | Digital | Carry Out (HIGH for counts 0–4, LOW for 5–9; divide-by-10 output) |
| 13 | CE | Digital | Clock Enable (Active Low — pull LOW to allow counting) |
| 14 | CLK | Digital | Clock Input (advances counter on rising edge) |
| 15 | MR | Digital | Master Reset (Active High — resets counter to Q0) |
| 16 | VDD | Power | Positive Power Supply (3–18V) |