ChipFTDI

FT2232HL Dual High Speed USB to Multipurpose UART/FIFO

Dual-channel high speed USB to multipurpose UART/FIFO IC with RS232 UART, FT245 FIFO, bit-bang, MPSSE and CPU-style FIFO modes. 64-pin LQFP package.

Aliase:FT2232HL

Datasheet (PDF)

LQFP-64 Top View

64 Pins

Pin-Tabelle64

Pin	Signal / Name	Typ	Alternative Funktionen
1	GND	Ground	Ground
2	OSCI	Analog	Crystal oscillator input
3	OSCO	Analog	Crystal oscillator output
4	VPHY	Power	+3.3V supply for internal USB PHY
5	GND	Ground	Ground
6	REF	Analog	USB reference resistor (RREF)
7	DM	Analog	USB D- data line (USBDM)
8	DP	Analog	USB D+ data line (USBDP)
9	VPLL	Power	+3.3V supply for internal PHY PLL
10	AGND	Ground	0V analog ground
11	GND	Ground	Ground
12	VCORE	Power	+1.8V core supply input
13	TEST	Digital	Test mode input
14	~RESET	Digital	Active-low device reset
15	GND	Ground	Ground
16	ADBUS0	Digital	Channel A UART TXDChannel A FIFO/bit-bang D0MPSSE TCK/SK
17	ADBUS1	Digital	Channel A UART RXDChannel A FIFO/bit-bang D1MPSSE TDI/DO
18	ADBUS2	Digital	Channel A UART RTS#Channel A FIFO/bit-bang D2MPSSE TDO/DI
19	ADBUS3	Digital	Channel A UART CTS#Channel A FIFO/bit-bang D3MPSSE TMS/CS
20	VCCIO	Power	+3.3V I/O interface supply
21	ADBUS4	Digital	Channel A UART DTR#Channel A FIFO/bit-bang D4MPSSE GPIOL0
22	ADBUS5	Digital	Channel A UART DSR#Channel A FIFO/bit-bang D5MPSSE GPIOL1
23	ADBUS6	Digital	Channel A UART DCD#Channel A FIFO/bit-bang D6MPSSE GPIOL2
24	ADBUS7	Digital	Channel A UART RI#Channel A FIFO/bit-bang D7MPSSE GPIOL3
25	GND	Ground	Ground
26	ACBUS0	Digital	Channel A TXDENChannel A FIFO RXF#GPIOH0
27	ACBUS1	Digital	Channel A FIFO TXE#Channel A FIFO WRSTB#GPIOH1
28	ACBUS2	Digital	Channel A FIFO RD#Channel A FIFO RDSTB#GPIOH2
29	ACBUS3	Digital	Channel A RXLED#Channel A FIFO WR#GPIOH3
30	ACBUS4	Digital	Channel A TXLED#Channel A SIWUA wake up inputGPIOH4
31	VCCIO	Power	+3.3V I/O interface supply
32	ACBUS5	Digital	Channel A FIFO CLKOUTGPIOH5
33	ACBUS6	Digital	Channel A FIFO OE#GPIOH6
34	ACBUS7	Digital	GPIOH7CPU-style FIFO A15
35	GND	Ground	Ground
36	~SUSPEND	Digital	Suspend state indicator
37	VCORE	Power	+1.8V core supply input
38	BDBUS0	Digital	Channel B UART TXDChannel B FIFO/bit-bang D0MPSSE TCK/SK
39	BDBUS1	Digital	Channel B UART RXDChannel B FIFO/bit-bang D1MPSSE TDI/DO
40	BDBUS2	Digital	Channel B UART RTS#Channel B FIFO/bit-bang D2MPSSE TDO/DI
41	BDBUS3	Digital	Channel B UART CTS#Channel B FIFO/bit-bang D3MPSSE TMS/CS
42	VCCIO	Power	+3.3V I/O interface supply
43	BDBUS4	Digital	Channel B UART DTR#Channel B FIFO/bit-bang D4MPSSE GPIOL0
44	BDBUS5	Digital	Channel B UART DSR#Channel B FIFO/bit-bang D5MPSSE GPIOL1
45	BDBUS6	Digital	Channel B UART DCD#Channel B FIFO/bit-bang D6MPSSE GPIOL2
46	BDBUS7	Digital	Channel B UART RI#Channel B FIFO/bit-bang D7MPSSE GPIOL3
47	GND	Ground	Ground
48	BCBUS0	Digital	Channel B TXDENChannel B FIFO RXF#GPIOH0
49	VREGOUT	Power	+1.8V regulator output, connect to VCORE via 3.3uF
50	VREGIN	Power	+3.3V input to integrated 1.8V regulator
51	GND	Ground	Ground
52	BCBUS1	Digital	Channel B FIFO TXE#Channel B FIFO WRSTB#GPIOH1
53	BCBUS2	Digital	Channel B FIFO RD#Channel B FIFO RDSTB#GPIOH2
54	BCBUS3	Digital	Channel B RXLED#Channel B FIFO WR#GPIOH3
55	BCBUS4	Digital	Channel B TXLED#Channel B SIWUB wake up inputGPIOH4
56	VCCIO	Power	+3.3V I/O interface supply
57	BCBUS5	Digital	GPIOH5
58	BCBUS6	Digital	GPIOH6
59	BCBUS7	Digital	PWRSAV# power save outputGPIOH7
60	~PWREN	Digital	Power enable input
61	EEDATA	Digital	Configuration EEPROM data
62	EECLK	Digital	Configuration EEPROM clock
63	EECS	Digital	Configuration EEPROM chip select
64	VCORE	Power	+1.8V core supply input

LQFP-64 Top View

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